Model A206 is a Voltage Amplifier/Low level Discriminator developed especially for instrumentation employing solid state detectors, proportional counters, photomultipliers or any charge producing detectors in the pulse height analysis or pulse counting mode of operation.
|Gain||10x nominal, non inverting|
|Input polarity||1) Positive Unipolar; Dynamic range: 85% of Vs
2) Bipolar; If a bipolar input is used, an external resistor (Rb = 330 K ) must be connected between Pin 3 and ground. Dynamic range: 65% of Vs
|Dynamic range||65% of Vs|
|Ac Output Impedance||20 ohm|
|Integral Nonlinearity at full output||< 0.5%|
|Input Polarity||Positive or Bipolar|
|Output pulse||Positive; 5 µs wide; 90% of Vs.
The output pulse width can be increased by the addition of an external capacitor (1 to 10 pF) between Pins 6 and 8.
|Rise time||20 ns|
|Reference voltage||Pin 11, Vr; Range: +4.5 to +5.5 VDC (impedance > 2 Mohm)|
|Variable voltage||Pin 10, Vv; (Vv < Vr)|
|Discrimination Level||Vr – Vv (impedance > 2 Mohm)|
|Operating Voltage||+10 to +18 VDC|
|Operating Current||0.8 mA quiescent @ 15 V|
|Temperature||-55 to +70 ºC operational|
|Package||16 Pin Dual In-Line (Metal)|
|Screening||Amptek High Reliability|
|Pin 1||Ground and Case|
|Pin 2||No Connection|
|Pin 3||Bipolar Input Bias|
|Pin 4||Vs Amplifier (+10 V to +18 V)|
|Pin 5||Vs Discriminator (+10 V to +18 V)|
|Pin 6||Discriminator Pulse Width Adjust|
|Pin 7||No Connection|
|Pin 8||Discriminator Pulse Width Adjust|
|Pin 9||Discriminator Output|
|Pin 10||+Vv variable (Vv < Vr)|
|Pin 11||+Vr reference (+4.5 to +5.5 VDC)|
|Pin 12||Discriminator Input|
|Pin 13||Amplifier Output|
|Pin 14||No Connection|
|Pin 15||No Connection|
|Pin 16||Amplifier Input|
The output of the VA is NOT internally connected to the LLD. Pin 13 MUST be connected to Pin 12 if the LLD is to be used.
Power to the VA and LLD is provided separately in order to provide maximum flexibility for independent operation. However, for normal operation Pins 4 and 5 should be connected to Vs.
If the output of the VA (Pin 13) is to be connected to external circuitry it MUST be coupled with an external capacitor. This output can drive several feet of unterminated coaxial cable.
For bipolar input pulses to the VA connect a 330 kohm resistor from Pin 3 to ground. This biases the amplifier for maximum dynamic range.
The LLD requires a reference voltage Vr and a variable voltage Vv. Set Vr at a level between +4.5 and +5.5 Volts and Vv to a lower voltage than Vr. The Difference, Vr-Vv, is the discrimination level at which the unit will trigger. For example, if Vr = +5 V and Vv = +3.5 V, any pulse of amplitude greater than +1.5 V will trigger the discriminator.
The LLD output pulse is typically a 5 µs wide positive pulse. A wider pulse can be obtained by connecting a capacitor (1 to 10 pF) between Pins 6 and 8. Leave these Pins unconnected if the standard pulse width is acceptable.
A typical circuit to provide bias to the LLD is shown below.
The PC236 is a printed circuit board designed to facilitate testing of the A203/A206 system. It provides the test circuit for the charge sensitive preamplifier, as well as the voltage references for the discriminator. All components are laid out on a ground plane in order to minimize noise and external pickup.
PC25 test board for the A225 with the A206. 2.625 in x 1.750 in (6.67 cm x 4.45 cm)
Horizontal Scale: 10 µs/div
Vertical Scale: 10 mV/div
Top Trace: Input to test capacitor -22 mV = 1 MeV(Si)
Bottom Trace: Output of CSP (A203, Pin 13)
Horizontal Scale: 500 ns/div
Top Trace: Unipolar output of SA (A203, Pin 8)
Vertical Scale: 50 mV/div
Bottom Trace: Bipolar output of SA (A203, Pin 9)
Vertical Scale: 100 mV
Horizontal Scale: 2 µs/div
Vertical Scale: 5 V/div
LLD Output-Positive (A206, Pin 9)