The A250 is a hybrid state-of-the-art Charge Sensitive Preamplifier for use with a wide range of detectors having capacitance from less than one, to several thousand picofarads. Such detectors include silicon, CdTe, CZT, and HgI2 solid state detectors, proportional counters, photomultiplier tubes, piezoelectric devices, photodiodes, CCD’s, and others.
To permit optimization for a wide range of applications, the input field effect transistor is external to the package and user selectable. This feature is essential in applications where detector and FET must be cooled to reduce noise. In all applications, it allows the FET to be matched to the particular detector capacitance, as well as to noise and shaping requirements. In larger quantities, the A250 may be specially ordered with an internal FET.
The noise performance of the A250 is such that its contribution to FET and detector noise is negligible in all charge amplifier applications, i.e., it is essentially an ideal amplifier in this respect.
The internal feedback components configure the A250 as a charge amplifier; however, it may be used as a high performance current or voltage preamplifier by choice of suitable feedback components.
Laboratory and commercial applications include nuclear physics; portable instrumentation; nuclear monitoring; aerospace; particle, gamma and x-ray imaging; medical and nuclear electronics; and electro-optical systems.
The Alpha Proton X-Ray Spectrometer (APXS) on-board the Mars Pathfinder micro-rover is designed to provide a complete detailed chemical analysis of Martian soil and rocks. The Amptek XR-100 X-Ray Detector with the A250 Charge Sensitive Preamplifier provides the APXS with x-ray fluorescence capability.
|Sensitivity (Cf = 1 pF)
|44 mV/MeV (Si)
55 mV/MeV (Ge)
36 mV/MeV (CdTe)
38 mV/MeV (HgI2)
Sensitivity can be reduced by connecting Pin 2 and/or Pin 3 to Pin 1, thus providing Cf = 3, 5, or 7 pF. Additional external capacitors can be added for further reduction of gain. In general, the sensitivity is given by A = 1/Cf (pF) V/pC. For silicon, the sensitivity is A = 44/Cf (pF) mV/MeV.
|Noise||Input FET dependent. See below: Typical Performance, A250 Noise Characteristics. About 100 electrons RMS (1.6 x 10-17 Coulomb).|
|Noise slope||Input FET dependent. See below: Typical Performance, A250 Noise Characteristics.|
Data presented in Figure 4 (“A250 output at high counting rates” under Operating Notes) is representative of results obtained with recommended FETs, and is characteristic of the FET and shaping time constants, rather than the A250, which is effectively noiseless. In general, the choice of input FET is based on its noise voltage specification (nV/root Hz) and its input capacitance (Ciss).
For low capacitance detectors, a FET with small Ciss should be chosen, such as 2N4416 or 2SK152.
For very high capacitance detectors, two or more matched high Ciss FETs such as the 2N6550 may be paralleled to achieve the best noise performance.
|Dynamic Input Capacitance||> 40,000 pF with 2 x 2SK147 FETs and Cf = 5 pF|
|Polarity||Negative or positive|
|Polarity||Inverse of input|
|Rise Time||2.5 ns at 0 pF input load with 2SK152 4.5 ns at 100 pF input load with 2N6650 or 2SK152 Figure 5 “Post amplifier input waveform at high counting rates” and Figure 6 “DC Coupled PIN-Photodiode to the A250” under Operating Notes.|
|Output Impedance||Pin 8: 100 ohm
Pin 9: < 10 ohm
|Integral Nonlinearity||< 0.03% for 0 to +2 V unloaded < 0.006% for 0 to -2 V unloaded|
|Decay Time Constant||300 Mohm x Cf = 300 µs, 900 µs, 1.5 ms, 2.1 ms User selectable T=Rf Cf|
|Positive Clipping Level||> +2.8 V|
|Negative Clipping Level||< -4.6 V|
|Gain-Bandwidth Product||fT > 300 MHz with 2N4416 FET. fT > 1.5 GHz with two 2SK147 FETs. See figure “A250 Small Signal Phase and Amplitude vs. Frequency” under Typical Performance.
|Operating Voltage||±6 V, (±8 V maximum)|
|Operating Current||±1.2 mA plus the FET drain current (Ids). Where: Ids (mA) = 3/R (kohm) – 0.25. As a special case, the internal 1 K resistor may be used for R, by connecting Pin 13 to Pin 14, giving Ids = 2.75 mA.|
|Power Dissipation||14 mW + 6[Ids]|
|Variation of Sensitivity with Supply Voltage||< 0.15%/V at ±6 V.|
|Temperature Stability||< 0.1% from 0 to +100 °C < 0.5% from -55 to +125 °C|
|Operating Temperature||-55 to +125 °C|
|Storage Temperature||-65 to +150 °C|
|Screening||Amptek High Reliability|
|Mean Time Between Failure (MTBF)||0.5/106 hrs @ +25 °C|
|Package||14 Pin hybrid DIP (metal)|
|Test Board||PC250. See below.|
|Options||– RC Feedback Kit (1 Gohm resistor, 0.1 pF capacitor)
– Internal FET (consult factory)
|Other Configurations (Package)||A250F with internal FET (SIP Package)
A250F/NF with external FET (SIP Package)
|Pin 1||300 Mohm resistor in parallel with 1 pF feedback capacitor. Connect this Pin to the detector and the gate of the FET|
|Pin 2||2 pF feedback tap.|
|Pin 3||4 pF feedback tap.|
|Pin 4||-6 V direct.|
|Pin 5||-6 V through 50 ohm.|
|Pin 6||Compensation (0-30 pF to ground) for low closed loop gain configuration (where a large feedback capacitor is used together with small detector capacitance).|
|Pin 7||Ground and case.|
|Pin 8||Output through 100 ohm.|
|Pin 9||Output direct.|
|Pin 10||+6 V through 50 ohm.|
|Pin 11||+6 V direct.|
|Pin 12||Ground and case.|
|Pin 13||Provide 2.75 mA drain current to the external FET by connecting Pin 13 to Pin 14. (See operating current specifications.)|
|Pin 14||Input. Should be connected to the drain of the FET. This Pin is held internally at + 3 Volts.|
The A250 can be tested with a pulser by using a small capacitor (usually 1 to 2 pF) to inject a test charge into the input. (see figure 1 below) The unit will respond to both the negative and positive edge of the test pulse which should have a transition time of less than 20 ns. A square wave or a tail pulse with long fall time (>100 µs) may be used. Charge transfer to the input of the A250 is applied only during the transition time according to Q = CtV, where Q = total charge transferred, Ct = value of test capacitor, and V = amplitude of voltage step. DO NOT connect the test pulser to the input directly or through a test capacitor greater than 100 pF as this can produce a large current pulse at the input FET and cause irreversible damage. The PC-250 Test Board provides a convenient way to test the A250. A 2 pF (±5%) test capacitor is provided as well as INPUT, OUTPUT, and POWER pins set in a ground plane configuration in a 1.75 inch x 1.75 inch PC board.
Input waveform: Square wave, or Tail pulse (Tr < 20 ns, Tf > 100 µs)
Amplitude: V = Q/Ct = 500 mV per picocoulomb for Ct = 2 pF
Example: To simulate 1 MeV in Si detector: 1 MeV (Si) = 0.044 pC, 500 mV/pC x 0.044 pC = 22mV
Hence, a 22 mV step into 2 pF test capacitor simulates the charge generated in a silicon detector by a particle when it loses 1 MeV of its energy.
The noise of a charge sensitive preamplifier must be tested together with the post amplifier/shaper.
The A250 noise characteristics given in the specifications are associated with specific shaping time constants in the post amplifier. The post amplifier must have very low input noise as in the case of NIM electronics amplifiers or the Amptek A275, so that its contribution to the measurement is minimal. The function of the post amplifier is not only to preserve and amplify the linear information received by the charge amplifier, but also to provide a band pass filter to eliminate frequencies that contribute to noise.
Two methods are normally used to measure noise in the preamplifier: The first one is by using a Multichannel Analyzer (MCA), and the second one is with a wide-bandwidth RMS AC voltmeter.
Example: With a 2 pF test capacitor
The RMS voltmeter is now calibrated to:
When measuring noise of the system either by the MCA or the RMS voltmeter method the detector must be simultaneously connected with the test circuit to the input of the A250. The noise measurement in this case will include the contribution from the detector due to both its capacitance and its leakage current.
The internal components connections will be adequate in most cases. For more critical applications, however, the current through the FET will have to be adjusted through the external resistor R, and the feedback components changed through the external RfCf. For low noise applications:
Cf < 1 pF typical and Rf > 1 Gohm typical
The value of these components will effect the Fall Time of the output pulse (T = RfCf). The Rise Time of the output pulse will not be effected by the feedback components since it depends mostly on the detector capacitance, the choice of the FET and the internal characteristics of the A250. See A250 specifications.
The Gain defining component in a charge sensitive preamplifier is the feedback capacitor Cf.
Gain (Sensitivity): A = 1/Cf Volts/picocoulomb (Cf in pF) In the case of silicon detector: A = 44/Cf in mV/MeV (Cf in pF).
Hence, for a 1 pF feedback capacitor the output of the A250 will produce a 44 mV pulse when a 1 MeV particle loses all of its energy in the detector.
It is important to note that in the charge sensitive preamplifier mode of operation the feedback resistor Rf does not effect the gain of the amplifier, it simply returns the output of the integrating loop to the baseline.
The charge sensitive preamplifier mode of operation will give the best overall signal to noise ratio. It is primarily used in applications where the signal from the detector is small as in the case of solid state detectors and proportional counters.
In applications where the counting rate of the incoming pulses approaches the RfCf time constant, the output of a charge sensitive preamplifier is shown in Figure 4.
Care should be taken not to exceed the positive or negative clipping level of the A250. The RfCf feedback components should be chosen to accommodate the expected count rates of the particular application.
Since the charge sensitive preamplifier is AC coupled to the post amplifier/shaper with a pole zero differentiator the resulting waveform will be as shown in Figure 5.
In applications where the signal generated by the detector is large and preserving the rise time information is of importance the current preamplifier mode of operation is preferred. These applications include high counting rates in electron multipliers or photodiodes in optical and laser communications. Referring to Figure 3, the size of the feedback components are typically:
Cf = 2 pF and Rf = 50 kohm
If (I) is the input current, then: Gain: Vo = (I)Rf
In this case, the Gain defining component is the Rf. The feedback capacitor Cf simply stabilizes the loop. The fall time constant will now be T = RfCf (approximately 100 ns).
In order to achieve low noise performance using the A250 Charge Sensitive Preamplifier with a solid state detector the following factors should be considered:
A short discussion of each of these subjects follows.
(Nt)2 = (Ni)2 + (Nc)2 Where: Nt is the total electrical noise generated by the detector. Ni is the noise due the detector leakage current. Nc is the noise generated due to the detector capacitance, the cable capacitance, the stray capacitance, and the bias resistor to the detector. Ni can be minimized by selecting a detector with low leakage current and by lowering the operating temperature of the detector. Care should be taken in selecting a detector due to the different manufacturing processes (see ref 2,3).
The topic of cooling the detector is discussed below. Nc can be minimized by using a short cable between detector and preamplifier and by minimizing any stray capacitance due to PC board layout and coaxial connectors. Typical capacitance for RG58, 50 ohm coaxial cable is 100 pF/m. The high voltage bias resistor should be chosen to have low noise, typically less than 0.5 db above thermal noise with a value greater than 1 Gohm for detectors with low leakage current. The voltage applied to the detector is :
Vd = Vb – (I)R
Where: Vd is the actual voltage on the detector. Vb is the power supply voltage. (I) is the detector leakage current. R is the bias resistor.
If the leakage current in the detector is high, care should be taken to calculate the voltage drop across the bias resistor. Typically the leakage current in the detector doubles for every 8 oC increase in temperature. The power supply voltage minus the voltage drop across the bias resistor should be equal to the manufacturer’s recommended operating voltage for the detector at a given temperature. Also, the voltage drop across the bias resistor should not be more than 10% of the supply voltage.
Almost all the noise produced by the input FET + A250 combination is due to the FET. The A250 circuit design has been optimized so that its noise contribution is negligible compared to the total noise of the system.
The choice of the input FET is left to the user so that it can be matched to the detector and optimized to the specific application. The A250 can be used with a number of FETs whose noise performance as a function of detector capacitance and shaping time constants in the post amplifier is given in the specifications. Usually, an FET is chosen with large transconductance (gm), while matching the FET’s input capacitance (Ciss), to the detector capacitance (Cd).
When cooling the detector, cooling the input FET is also recommended. The A250 does not need to be cooled. If, however, it is more convenient to cool the detector + FET + A250, then the lowest temperature the A250 can be operated at is -55 oC. When cooling the detector + FET, the preamplifier feedback resistor and capacitor must be near the FET, with shielded wires connecting to the A250. In this configuration, do not use the internal feedback components in the A250. Use an external resistor and capacitor.
As the temperature decreases, the detector leakage current and noise decreases. Also, the gm of the FET increases. This results in a larger signal to noise ratio. In most FETs the gm stops increasing at approximately -140 oC (133 0K), because of freeze-out of the dopant of the semiconductor material. Hence, for most FETs the transconductance will be maximum at approximately 133 oK and then it will drop by about 10% as the temperature reaches 77 oK (Liquid Nitrogen, LN2). In many experiments requiring cooling, the detector is placed at the LN2 temperature, and the FET is placed further away or heated, so that its temperature is near 133 oK. Example of FETs used in experiments requiring cooling are: 2N4416, 2N6451, 2SK152, 2N6550, and 2N3823.
In cryogenic experiments where both the detector and the FET must be at Liquid Helium temperature (4 oK), different FETs must be used. The manufacturing process of these FETs allows them to be cooled down to 4 oK. An example is the SONY GaAs MESFET SGM2006M (previously known as 3SK164). Use of this FET, however, at higher temperatures (near 133 oK) is not recommended because its noise performance will be inferior to the FETs previously mentioned.
Most low noise FETs exhibit a noise of about 100 – 120 electrons RMS at room temperature. This noise decreases to approximately 15 – 25 electrons RMS as the temperature reaches 133 oK.
In applications where the input FET and detector are cooled, with the A250 located a short distance away (a few cm), the feedback resistor and capacitor should also be located at the FET end. In most applications, because of the short distance from FET to the A250, no coaxial cables are needed to make the electrical connections. Care should be taken to eliminate noise pick-up by shielding the entire system.
In applications where the detector, input FET and feedback components are located further away unterminated coaxial cables may be used to make the electrical connections. The maximum length of these cables is dependent on FET characteristics, and detector, feedback and load capacitance, but usually at least 2 m is possible. Two coaxial cables will be needed, one to connect the output of the A250 to the feedback network in the cryostat, and other to connect the A250 input to the FET Drain. Since the addition of the cable will decrease the closed loop phase margin of the preamplifier, the A250 should be configured with this in mind. The feedback capacitor should be as small as possible, consistent with the gain, linearity, and risetime requirements. If necessary, a compensation capacitor from Pin 6 to ground can be added to lower the frequency of the dominant pole of the A250.
Probably the most important consideration with a remote FET is proper grounding and shielding. The outer conductor of the Drain (A250 input) cable should be connected to ground at the A250 end, and to the FET Source at the other end.
For the feedback cable, the outer conductor should be connected to ground at the A250 end, and left unconnected at the other end.
The High Voltage bias to the detector should be decoupled with a capacitor to the FET Source node in the cryostat. Any additional shielding around the detector and FET should be connected to this node. An additional low impedance ground cable from this node back to the A250 may also be helpful.
Since the feedback capacitor must be discharged, a resistor is usually placed in parallel with that capacitor. This resistor is a source of noise for the input and should be as large as possible. With low leakage detectors, the value of the feedback resistor may be several Gohms. The A250 has an internal feedback resistor of 300 Mohms available at Pin 1. This was the largest value resistor that could be accommodated inside the hybrid package at the time of the original design. Although this internal resistor is adequate for many applications, it should not be used in high resolution experiments. Instead, an external feedback resistor should be used of as large a value as detector leakage current allows. For systems with AC coupled detectors, the maximum feedback resistance is determined by the gate leakage current of the FET. Typically, the gate voltage will be about -1 V.
The A250 output voltage will be :
DCVout = -1 V – Rf * (gate leakage current)
For an FET with gate leakage current < 50 pA. DCVout must not be allowed to reach the clipping level. If DCVout is to be about -2 V, then Rf must be <20 Gohms.
For DC coupled detector systems, the detector leakage current must be added to the gate leakage current in the DCVout formula above. Usually, detector leakage dominates FET leakage. For example, with a 1 nA detector leakage current and DCVout= -2 V, Rf must be less than 1 Gohm.
In very high resolution systems measuring X-Rays or Gamma Rays other methods are used in order to discharge the feedback capacitor. These methods are optical pulsed feedback, and transistor reset circuits. (see ref. 5,6)
The purpose of the post amplifier is to provide amplification and to filter out low and high frequency noise. This amplifier should be of low noise, typically less than 4 nV/Hz. Most operational amplifiers are too noisy or have insufficient gain-bandwidth or slew rate to be suitable for shaping amplifiers.
The shaping time constant in the post amplifier should be selected for each application. For room temperature experiments the shaping time constant is usually between 0.5 µs and 3 µs. For cooled experiments greater than 3 µs is used.
There are many types of shaping methods used to filter out low and high frequency noise (RC-RC, Gaussian, Cusp, Triangular, Trapezoidal and others). The most commonly used is the Gaussian shaper. An example of a 3 pole Gaussian shaper is shown in “The A250 Connected to a Solid State Detector” diagram under Applications. An example of a 5 pole Gaussian shaper is shown in “Connection to a Solid State Detector with 5 Pole Shaping and Active Baseline Restoration” in the A275 specifications under Applications. Increasing the number of poles normally improves the symmetry of the output pulse, which improves the noise and count rate performance of the system.
Example: For a cooled system to reach a total noise of about 20 electrons RMS (180 eV FWHM, Si):
The A250 did not enter into the considerations because its noise contribution is negligible compared to that of the input FET and detector.
FET Source: InterFET Corporation
715 N Glenville Dr., Suite 400
Richardson, TX 75081
Tel: 972 238-1287, Fax: 972 238-5338, e-mail: TechSales@interfet.com, http://www.interfet.com.
The PC250 is configured for DC coupling at the factory. This produces the lowest noise response but is also the most vulnerable to damage. In DC coupled mode the HV is applied externally to the detector. The user connects the output of the detector to the IN (Detector Input, DC Coupling) post on the PC250 as shown on the schematic.
AC coupling is often a more convenient and safer method to connect the detector when the lowest noise performance is not required. In this configuration the HV bias is applied through the PC250 test board. In order to configure the board for AC coupling the user must do the following:
Dimensions: 1.75in X 1.75in (4.5 cm X 4.5 cm)
Optional RC Feedback Kit available (1 Gohm resistor, 0.1 pF capacitor)
as a function of detector capacitance, input FET, feedback capacitor, and shaping times
versus detector capacitance and FET
2SK152/3mA, Rf = 300 Mohm, Cf = 1 pF, Cd = 0 pF
2N4416/3mA, Rf = 60 kohm, Cf = 0 pF, Cd = 0 pF
Typical RF = 1 M, RI = 10 K
GAIN: Vo = VI(RF/RI)
for low capacitance FET: 2N4416 (Ciss = 4 pF, Ids = 3 mA)
for high capacitance FET: 2 x 2SK147 (Ciss = 180 pF, Ids = 1.5 mA each)